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OverviewThe demands of enterprise and high performance computing mandate highly reliable and scalable 64-bit systems. UltraSPARC III based systems offer customers investment protection already built in with CPU features including copper interconnect for improved signaling and best-in-class power consumption, shortened 65 nanometer gate length for faster performance, mixed speeds in a chassis, thermal and electrical footprint preservation enabling simple upgrade paths and industry-leading RAS. UltraSPARC III based systems are optimized to meet, or exceed, customer expectations providing real-world performance and reduced Total Cost of Ownership (TCO).Investment ProtectionThe UltraSPARC-III executes application binary code running on all previous SPARC implementations, resulting in easy migration between current and future UltraSPARC processor-based systems. Maintaining compatibility protects customers' long-term application investments. More than 15 years of binary compatibility.ReliabilityUptime Bus provides a means to diagnose system bus errors when the main bus cannot be accessed. ECC helps ensure the integrity of all stored and transmitted data. Error removal and recovery uniquely marks copyback errors so they cannot propagate through a multiprocessor system. All this provides error containment and removable capabilities for multiprocessing systems and system reliability. Improves uptime, and diagnostics capabilities and the overall reliability of the system.ScalabilityThe on-chip memory controller--capable of addressing up to 16 GB of main memory at 2.4 Gbps--and the Sun Fireplane Interconnect--running at 150 MHz providing the system bus interface--provide exceptional scalability. System memory bandwith seamlesly scales with the number or processors, maintaining an almost linear increase in compute power and thereby keeping the total cost of ownership low of capacity needs increase. Each CPU added to the system increases the available system memory. Sun's Fireplane Interconnect is capable of supporting over 1000 CPUs/system.High PerformanceThe following features enable the processor, applications, and operating systems to utilize larger amounts of physical memory, lower memory latencies, improve signalling, and reduce power consumption: 64-bit data addressing, four-way superscalar, 14 stage non-stalling pipeline, speculative execution, on-chip memory controller and L2 tags, up to 8 MB external L2 cache, advanced process technology including copper interconnects, low-k interlayer dialectric.TechnologyUltraSPARC processor technology drives Texas Instrument's leading-edge process technologies including aggressive transistor technology and copper interconnect. Currently, UltraSPARC III is produced on a 0.13 micron copper process using low-k interlayer dielectric, PNO (a nitrided gate oxide) and 90 nanometer gate-length transistors. The UltraSPARC III architecture is also designed with leading innovations such as a non-stalling pipeline, non-aligned instruction fetch, speculative execution of branches and memory loads. Frequency1050 MHz - 1.2 GHzCPU to system bus clock frequency ratios: 6:1, and 7:1 CacheL1 cache: 64KB 4-way Data, 32KB 4-way Instruction, 2KB Write, 2KB Prefetch.L2 cache: Up to 8 MB External, On-chip controller and address tags. ScalabilityMP scalability: Over 1000 CPUs/system.MemoryOn-chip memory controller capable of addressing up to 16 GB of main memory at 2.4 GB/sec.I/OThe Sun Fireplane Interconnect provides the Bus interface.PowerThe processor's copper interconnect provides improved signalling and reduced power consumption.SystemDeployed in:
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