Features, Functions and Benefits

Four-way superscalar pipeline, 64-bit wide memory interface with 800 Mbyte/sec capacity combined with 64-bit wide internal buses.

The UltraSPARC IIe processor can provide a balance of general-purpose computing and operate effectively in embedded networking applications.

It delivers significantly higher data througput than 32-bit processor operating at the same clock rate.

Includes the memory controller, PCI controller, and Level 2 cache in addition to the CPU, eliminating the need for an external "Northbridge" chip.

All that is needed to create a basic system are clock, power, interrupt controller, boot ROM, SDRAM memory, and PCI bus peripheral chips.

The high degree of integration makes it particularly well-suited for ultra-slim server appliances and 1u rackmount, NEBS-complaint telecommunications computing applications.

Power management logic to support the design of Energy Star-compliant systems.

The chip's operation can be slowed to one-half or, under certain operating conditions, to one-sixth of its normal operating frequency.

Reduced power consumption.

Complete compatibility with the more than 12,000 applications developed for the SPARC® family.

Backed by the complete Sun development environment and the world-class Solaris Operating Environment.

Protects the system designers' investment in software.