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UltraSPARC T1 Processor

UltraSPARC T1 Processor

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Features and Benefits

 

Performance and Power
Feature Function Benefit
UltraSPARC T1 processor with CoolThreads technology offers up to eight 4-way multithreaded cores. Support for up to 32 simultaneous threads, with eight threads executed per clock cycle. Radically higher throughput for multi-threaded applications as well as multiple, single-thread applications.
All cores connected to memory and the I/O subsystem through a 134-GB/sec. crossbar switch. Very fast communication between cores and memory. Higher performance through low latency.
High-bandwidth shared 4-Bank 3-MB L2 cache. Optimum-sized cache for multi-threaded processors. Reduces processor cost and complexity, ensuring a balance is achieved between high throughput and low cost/complexity.
Four on-chip DDR2 channels delivering 25.6 GB/sec. processor-to-memory bandwidth. Direct access from processor to memory, with minimum contention for memory. High throughput with low memory latency and low power.
Typical processor power consumption of 72 watts, delivering 32 simultaneous threads. Keeps the performance-to-power ratio very low while reducing heat dissipation. Helps reduce cost, improve reliability, and ensure customers can grow within current data center power and thermal limitations.
Reliability
Feature Function Benefit
ECC and/or Parity Protection on caches, TLBs, and Register files. Maintenance of data integrity across on-chip memories. Mainframe class processor RAS with features unique to volume processors, enhancing system uptime.
Chipkill and DRAM sparing. Chipkill is used to detect failing DRAM. DRAM channel is then mapped away from failing DRAM through Sparing. Extreme levels of main memory reliability and availability, enhancing system uptime by allowing the system to keep running in the event of a memory DRAM failure.
On-chip thermal sensors. Implementation of throttling measures (disabling cores/threads) if temperature increases due to fan or HVAC failure. Power savings and thermal reliability with enhanced system availability.
Investment Protection
Feature Function Benefit
SPARC v9 implementation. Standard SPARC processor implementation, delivering binary compatibility with previous generation of Sun systems and Solaris software. Customer investments in existing software assets and skills are preserved.

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