UltraSPARC T2 and T2 Plus Processors

UltraSPARC Architecture 2007 Specification, Hyperprivileged Edition (610 pages)

(a.k.a. UA 2007 Family Programmer's Reference Manual) The UltraSPARC Architecture 2007 is a complete specification of the instruction set architecture (ISA) common to Sun Microsystem's 64-bit SPARC implementations (beginning with UltraSPARC T1 in 2005). UltraSPARC Architecture 2007 complies with SPARC V9 Level 1, with many more details, plus includes numerous Sun extensions common to all UltraSPARC processors. Information in this (and the following) documents can help with Operating Systems ports (including Linux).

The Hyperprivileged edition of this document describes the Nonprivileged, Privileged, and Hyperprivileged (hypervisor/virtual machine firmware) levels of the architecture. Download it if you are writing hyperprivileged firmware ("Hypervisor" code) or designing your own processor based on OpenSPARC.

UltraSPARC T2 Implementation Supplement, Hyperprivileged Edition (1184 pages)

(a.k.a. UltraSPARC T2 Programmer's Reference Manual) This document contains information about processor-specific aspects of the architecture and programming of the UltraSPARC T2 processor. It is intended to supplement the UltraSPARC Architecture 2007 Specification with processor-specific information.

UltraSPARC Architecture 2007 Specification, Privileged Edition (460 pages)

(a.k.a. UA 2007 Family Programmer's Reference Manual) The UltraSPARC Architecture 2007 is a complete specification of the instruction set architecture (ISA) common to Sun Microsystem's 64-bit SPARC implementations (beginning with UltraSPARC T1 in 2005). UltraSPARC Architecture 2007 complies with SPARC V9 Level 1, with many more details, plus includes numerous Sun extensions common to all UltraSPARC processors. Information in this (and the following) documents can help with Operating Systems ports (including Linux).

The Privileged edition of this document describes the full Nonprivileged (application software) and Privileged (operating system software) levels of the architecture. Download it if you are writing application software, writing a code generator, or writing/porting operating system software to run on top of existing Hypervisor firmware.

UltraSPARC T2 Implementation Supplement, Privileged Edition (146 pages)

(a.k.a. UltraSPARC T2 Programmer's Reference Manual) This document contains information about processor-specific aspects of the architecture and programming of the UltraSPARC T2 processor. It is intended to supplement the UltraSPARC Architecture 2007 Specification with processor-specific information.

Accelerate Multithreaded Applications with CMT Processors

Running multithreaded applications on multicore/multithreaded processors is the new paradigm for maximum, throughput performance. This white paper highlights the technical benefits Sun's chip multithreading (CMT) UltraSPARC T2 processor delivers to multithreaded applications, and provides detailed examples of significant performance gains in three application workloads: telco, cryptography, and string searching.

Using the Cryptographic Accelerators

Configuring Messaging Server and UltraSPARC T1 and T2 Hardware SSL Acceleration